Microfabrication of nonvolatile semiconductor storage devices such as a NAND flash memory have advanced to a level of employing new methodologies in providing insulation between the memory cells. Application of an air gap is being considered to replace insulation schemes in which the spaces between the memory cells are filled with dielectrics such as an oxide film. Because nothing is filled within an air gap, electric coupling between the neighboring memory cells can be minimized to improve the insulation properties of the memory cell region.
The air gap insulation scheme indeed improves the electric isolation between the memory cells. However, the gate electrodes of peripheral circuit transistors formed in the peripheral circuit region and select transistors formed in the memory cell region, typically comprising a polycrystalline silicon film, exhibits relatively higher resistance compared to the silicide portion located at the upper portion of the gate electrodes, which is one of the improvements that need to be made. Further, especially in the select transistors with scaled channel length, heavy dope of impurities, typically boron, being implanted in the channel region for increasing the threshold voltage causes an increase in the resistance in the region located between the NAND strings where contact is established with the bit lines.